The present invention relates generally to plasma etching reactors and more particularly to an improved plasma reactor for batch wafer processing as employed in the fabrication of integrated circuits.
Plasma or reactive ion etching (RIE) is widely used to etch a variety of thin film materials and has been shown to be compatible with commonly used photoresist systems. One of the advantages of RIE is that it is a highly directional etching technique which does not exhibit many of the shortcomings of prior processes such as ion milling and sputter etching.
The recent trend has been toward larger reactors which can process larger batches of semiconductor wafers, and thereby provide more economical integrated circuit manufacture. One problem encountered in scaling up RIE tools is maintaining a uniform etch rate from wafer to wafer in a batch. This problem has been addressed, with varying degrees of success, by prior art etching devices such as those described in U.S. Pat. No. 4,297,162 to Mundt et al., and U.S. Pat. No. 4,307,283 to Zajac. Another such device is described in U.S. Pat. No. 4,340,361 to Hendricks et al. and assigned to the assignee of the present invention. The Hendricks et al. plasma chamber includes a conductive apertured baffle plate affixed to the anode for adjusting the etchant species concentration across the target to provide a uniform concentration from wafer to wafer. This is accomplished by providing apertures in the baffle plate of various sizes, shapes and locations.
U.S. Pat. No. 4,349,409 to Shibayama et al. discloses a plasma reactor including an electrically isolated, apertured, intermediate electrode between the anode and the cathode of the plasma chamber. The distance between the intermediate electrode and the cathode, and the electrode bias voltage, are varied during the etching process in order to remove any previously damaged surface layer and any unwanted deposits from the wafers being etched.
An RF plasma reactor for batch processing is disclosed in U.S. Pat. No. 4,384,938 to Desilets et al., which is assigned to the assignee of the present invention. In this reactor the cathode to chamber sidewall spacing is less than the thickness of the system plasma sheath to improve etch rate uniformity while maximizing the number of wafers that can be processed in a single batch.
Another problem in scaling up a plasma reactor to a larger batch size is that the plasma potential is increased. This is particularly true in the case of reactors wherein the cathode size is maximized in order to increase the batch size, without increasing the overall diameter of the reactor. The increase in plasma potential is a result of the decrease in the area ratio of the plasma chamber, which is defined as the total surface area of the chamber at ground potential exposed to the plasma divided by the surface area of the electrode at high potential. For example, in a reactor such as the one described in the Desilets et al. patent, where the cathode size is maximized, a plasma potential as high as 160-170 volts has been observed.
The plasma potential, i.e., the potential difference between the plasma and the grounded reactor surfaces, is a measure of the amount of ionic bombardment to which these surfaces are subjected. If the plasma potential is greater than the sputtering threshold of the reactor wall material, then the wafers being processed will be subjected to contamination from the sputtered materials from the reactor surfaces. The increased plasma potential also has been observed to increase the chemical activity of the reactor surfaces, which causes the larger system to etch differently as compared to a scaled-down reactor and necessitates changes in the process parameters.